Forum Discussion
Altera_Forum
Honored Contributor
8 years ago$readmemb() works in a verilog initial block to set the initial contents of a block ram. This is valid in QuartusII to fill a register array (eg, block rams) with data at FPGA configuration time. It will work either in QuartusII (implementation) or modelsim (simulation).
However, $writememb() makes no sense in an FPGA implementation itself. Write the memory contents where? $writememb() would only be valid and useful in a test bench, not the FPGA itself. It does work in modelsim (simulation) as in a test bench context.