Serial port signals usually runs at a slow clock rate and they don't need to be constrained because a synchronization stage to the fast system clock is included in the serial port IP core.
(With slow I mean a clock rate up to 1MHz or a few MHz. If you are driving a spi at 50MHz you do need to specify some timing constraints).
The serial clock itself is usually a generated signal coming from a register or even a combinatorial net; it is not a true clock.
We generally consider 'slow' serial port signals like common I/O. Then you can ignore their timing by setting them to false paths or specifying multicycles.