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The Setting in the compiler will select some settings in the IO buffer that will select the input threshold levels (LVCMOS vs LVTTL) and drive strength, etc. However if the VCCIO is not the expected level, all bets are off.
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I presume, you are just guessing. Comparing Cyclone III configuration files compiled with different I/O standard settings, I see, that Quartus effectively has only two different settings for regular single ended inputs
- 2.5 to 3.3V, no difference betweel LVCMOS and LVTTL
- 1.2 to 1.8V
In addition, PCI clamp diodes are turned on by default for the 2.5 to 3.3 V range, as specified in the datasheet.
It's not clear to me, what's actually changed between both ranges. It would be interesting to check the real input buffer thresholds. My assumption is, that the input will be still operational with an about 1/2 VCCIO threshold for a "wrong" voltage setting, but possibly reduced performance.
On output, I/O standards are mainly used to select a set of output transistors from current strength settings.
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