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Altera_Forum's avatar
Altera_Forum
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17 years ago

Intrroducing delay at pin level

Hello All, I am new to the Quartus tool, I just need your help to solve my doubts. I wanted to that "How to introduce output delay at pin level" Example: I have two input signals in...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
17 years ago

I cant use clock, because its a requirement. Clock shall not be used to generate the enable signals to the Data buffer.

Here in my case clock is coming for other board1 and the inp1, inp2 are coming from other board2, and op1 and op2 are going to the board3. thats why I should not generates the enable for board3 which is dependent on board1