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Rather than trying to break into the IP, its easier to take over the JTAG interface. In your case, is there a host with network interface that can always access the JTAG USB-Blaster interface? If that host is an x86, then you could conceivable run the JTAG server on that machine. Then a remote machine running Quartus can be used to access the device.
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I agree that connecting through the JTAG pins seems to be the only way to get access to the virtual JTAG resources.
In a system with the FPGA as only intelligent device that also performs all external communication, it might require a JTAG loopback, multiplexing the external JTAG connector with a JTAG master build in the FPGA.
I should mention, that the system wasn't originally designed to route the FPGA JTAG interface through a remote connection. But some years after launching the new hardware platform, we recognize that it would really ease the live of developers and service engineers. Although I know pretty well that Altera doesn't provide the option, I still think that simply reconnecting the virtual JTAG interface in the logic fabric looks like a straightforward solution.
Thanks for your suggestions,
Frank
Honored Contributor
