Inter path competition

Hi,

You may try to apply maximum fanout setting to the node. This Maximum Fan-Out attribute and logic option direct the Compiler to control the number of destinations that a node feeds. The Compiler duplicates a node and splits its fan-out until the individual fan-out of each copy falls below the maximum fan-out restriction. You can apply this option to a register or a logic cell buffer, or to a design entity that contains these elements.

You can set the Maximum Fan-Out logic option in the Intel Quartus Prime software. This option supports wildcard characters. You can also set the maxfan attribute in your HDL code, as shown in these examples (Table 27 https://www.intel.com/content/dam/www/programmable/us/en/pdfs/literature/ug/ug-qps-compiler.pdf)

Thanks.

Best regards,

KhaiY