Instantiation of '***_mem_model' failed

Hi, everybody~

when I run RTL simulation with nativelink ways, the error below appears in modelsim:

"Error: (vsim-3033) ......./testbench/ddr_example_top_tb.v(259): Instantiation of 'ddr_mem_model' failed. The design unit was not found."

Region: /ddr_example_top_tb

# Searched libraries:

# C:\altera\11.0\modelsim_ae\altera\verilog\altera

# C:\altera\11.0\modelsim_ae\altera\verilog\220model

# C:\altera\11.0\modelsim_ae\altera\verilog\sgate

# C:\altera\11.0\modelsim_ae\altera\verilog\altera_mf

# C:\altera\11.0\modelsim_ae\altera\verilog\altera_lnsim

# C:\altera\11.0\modelsim_ae\altera\verilog\cycloneive

# C:\altera\11.0\modelsim_ae\altera\verilog\cycloneiii

# E:\.....simulation\modelsim\rtl_work

# E:\......\simulation\modelsim\rtl_work

# E:\......\simulation\modelsim\rtl_work

# Error loading design

Will you please give me some tips why this error appears and what can I do?

I use Cyclone IV E EP4C10F, and now I want to simulate its ddr2 contoller example