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Altera_Forum's avatar
Altera_Forum
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15 years ago

Instantiating RAM in a vhdl for loop

hello,

I do not have much experience in VHDL, so i would appreciate any help :)

i want to initialize RAM memories with .hex files.

The memory in question is a very big memory, built of duplications of the same vhd file (30 duplications of 64X512).

In the Megawizard there's an option to specify the hex file, but i need different hex files for each instantiation. I heard there is an option to use "generic map" but i'm not quite sure how to do it.

the memory file is part of an internal block, instantiated 30 time.

my code is:

--------------------------------------------------

block_i : for i in 0 to (NUM_OF_TABLES - 1) generate

a_table : a_table_top

port map (

reset_n => reset_n,

sysclk => sysclk,

start_search => start_search,

tst_ip => tst_ip,

end_of_search => end_of_search,

fetch_info => fetch_info(i),

match => match(i),

match_addr => match_addr(6*i+5 downto 6*i),

address_a => table_addr,

byteena_a => byte_enable,

data_a => table_data,

rden_a => mem_re(i),

wren_a => mem_we(i),

q_a => mux_data(64*i+63 downto 64*i)

);

end generate block_i;

------------------------------------------------

* a_table_top is the block containing the memory file.

Thank you so much for the help,

Yael

1 Reply

  • Altera_Forum's avatar
    Altera_Forum
    Icon for Honored Contributor rankHonored Contributor

    you're probably best off using the altsyncram megafunction

    I dont quite get what you're trying to do with this code. and AFAIK, the megafunction is the only place you can read in .mif or .hex files properly.