Instantiating LPM Functions in VHDL: parallel adder

Hello guys...

I'm trying instatniating some altera MF directly in my top design.

From what I have understand I have two use two libraries:

library altera_mf;
use altera_mf.altera_mf.components.all;
library lpm;
use lpm.lpm_components.all;

The first libray is used to avoid the components declarations and the second is used to instantiate directly the lpm objects.

So, as I want to use a parallel adder, I wrote:

parallel_add_inst : parallale_add
GENERIC MAP(....)
PORT MAP(...);

By the way, looking at the Integer Arithmetic Megafunctions User

Guide, the port map of the parallel adder is:

data:in altera_mf_logic_2D(size - 1 downto 0,width- 1 downto 0);
clock : in std_logic := '1';
aclr : in std_logic := '0';
clken : in std_logic := '1';
result : out std_logic_vector(widthr - 1 downto 0));

So, how should I write the port map if I want to add two input signals (eg dataa[15..0] and datab[15..0]) ?

Thank you !

Have a nice day !