Instantiating LPM Functions in VHDL: parallel adder

Thank you tricky. The vector was a std_logic_vector( 0 downto 0). The problem was only caused by a type mismatch..

Trying to compèile the whole code there are some issues using:

function slv_to_alteras_stupid_2d_type( a : std_logic_vector; b : std_logic_vector) return altera_mf_logic_2D is     variable ret :
altera_mf_logic_2D(
begin
for i in a'range loop        
ret(0,i) := a(i);        
ret(1,i) := b(i);
end loop;          
return ret;      
end function;

in the case of

function slv_to_alteras_stupid_2d_type(bus1(18 downto 3), bus(15 downto 0))

I will try with some other attributes in the for loop.