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For the first error, your byteenable signal should be a vector, not a std_logic, and have a width compatible with your data bus size.

For the second one, if you have a dataavailable input on your component, you also need a read output. This signal isn't useful if you don't intend to read!

You should start by reading the avalon specification (http://www.altera.com/literature/manual/mnl_avalon_spec.pdf) to understand how those signals are used.