inout Std_logic_vector Signal Test

Ok

You are rigth but what I am wondering is the fact that I have a reference Design from Arrow interfacing with an external memory.

Take a look below:

There is no top level vhdl file specified (top_level_hdl_file "" ).

It means they just wrote a _hw.tcl as interface to the external SRAM.

What that means ? such a connection without specified SRAM Controller?

package require -exact sopc 9.1#  | #  +-----------------------------------
#  +-----------------------------------#  | module ext_ram_16#  | 
set_module_property DESCRIPTION "Interface to an IS61VPS102418A device"
set_module_property NAME IS61VPS102418A
set_module_property VERSION 1.0.0
set_module_property INTERNAL false
set_module_property GROUP "CycloneIV Starterkit Components"
set_module_property AUTHOR "Arrow Electronics"
set_module_property DISPLAY_NAME "IS61VPS102418A SRAM"
set_module_property TOP_LEVEL_HDL_FILE ""
set_module_property INSTANTIATE_IN_SYSTEM_MODULE false
set_module_property EDITABLE true
set_module_property ANALYZE_HDL TRUE#  | #  +-----------------------------------