Forum Discussion
Altera_Forum
Honored Contributor
14 years ago --- Quote Start --- the only differences are the introduction of 2 clocks and the rden_a and rden_b port --- Quote End --- "The only difference" actually matters. Your code requests synthesis of a RAM output register, that holds the previous value if rd_en is inactive. But there's no equivalent register avaible in the hardware. Please notice that the clocked read action you are associating with rd_en is actually "absorbed" by the register level at the RAM input, so it's not available at the RAM output. I don't clearly see, what's the purpose of the rd_en action in your design. The RAM itself doesn't require it.