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Altera_Forum
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16 years ago

Inferred latches for variables

I have problem in determine wat is the actual problem given by these two warnings: Warning (10235): Verilog HDL Always Construct warning at decimal_to_binary.v(32): variable "count" is read in...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
16 years ago

Thanks to all advices that u all gave to me. My program now is working and ready to be downloaded into the DE2 board.