In old Quartus 9.1, I was able to overwrite input vwf file with simulation output (timing and functional). Also, I was able to see internal state of FSM machines in design (not connected to output pins). How can I do the same in Quartus Prime 18.1?

Dear Vicky,

Here is the output waveform. I run timing simulation (not functional), in order to see the delays.

As you can see, the signal "actual" shows U, as undefined.

In old Quartus II version 9.1 you were able to combine the input file with the output file in a single file, and see the changes of "state machine" type of signals.

Is it possible in Quartus Prime 18.1 (I have standard version licensed) to combine input and output files in single input file as old Quartus II 9.1?

Is it possible to see the state machine changes in output file?

If I insert the flip-flops of this state machine I can see the changes of flip-flops, but is hard to follow, if there are many states, and if Quartus uses similar to "one hot" coding for the state machine.

Hope you can help me in finding a solution for this case.

Regards,