Altera_Forum
Honored Contributor
Honored ContributorIMUX in VHDL
How to implement this? Any tips please.
I googled for hours before ending up here. Please help me. Its a 1input to 3outputs IMUX.Forum Discussion
3 Replies
Altera_ForumHi, what do you mean by "IMUX" ? Is it a WiFi Multiplexer ? If yes, You get a big work.
1 in 3 out = demux, isn't it ? You have plenty of examples. In VHDL you can just describe the behaviour.- Altera_Forum--- Quote Start --- Hi, what do you mean by "IMUX" ? Is it a WiFi Multiplexer ? If yes, You get a big work. 1 in 3 out = demux, isn't it ? You have plenty of examples. In VHDL you can just describe the behaviour. --- Quote End --- Its inverse multiplexer man. Unlike demux, imux will divide the inputs to multiple slow speed lines. I'm trying to send a 4 bit digital in a single input and divide that to 4 lines(1 bit each line) and then display at output.
- Altera_Forum
That just sounds like wires to me.
