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Altera_Forum
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15 years ago

Improving the performance of LVDS DDR at 200MHz

I am trying to improve the performance of an LVDS DDR interface. I currently use DDIO registers to create a DDR interface and then send it out via LVDS. I have 33 DDR channels with one latching...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
15 years ago

Josyb,

Thanks for your reply. Unfortunately its not another FPGA. Its a custom ASIC. Good idea though. Varying the board traces could allow me to reduce some of the data skew.

Thanks for your suggestions

C