Implementing in BRAM using Megawizard

Once you have the megafunction generated, you can instantiate it like any other verilog module.

Usually one of the files generated is either a verilog file, or black box with the port definitions. You just the same port calls and include the qip file as part of the syntheis stage.

Usually they also have a .vo file for simulation. So you can simulate the design with that.

Pete