Forum Discussion
Altera_Forum
Honored Contributor
15 years agoHere it is.
But my ind is the position of the array i mean like in C vet[i] If it isnt good, what can i do ? i don't think i can do this with std_logic, or bit. or i can? thankslibrary ieee;
use ieee.std_logic_1164.all;
use ieee.std_logic_arith.all;
entity PC is
port(
input : in std_logic_vector(7 downto 0);
output : out std_logic_vector(7 downto 0);
PCin :in std_logic;
address : in std_logic_vector(3 downto 0);
PCJR: in std_logic;
PCJump: in std_logic;
BEQ: in std_logic;
BEQ_control : in std_logic;
clock : in std_logic;
indice : out std_logic_vector(7 downto 0)
);
end PC;
architecture logic of PC is
type instructions is array(0 to 8) of std_logic_vector(7 downto 0);
signal ins : instructions;
begin
--Instructions
ins(0) <= "11000001";
ins(1) <= "11001011";
ins(2) <= "00100011";
ins(3) <= "11000010";
ins(4) <= "11011010";
ins(5) <= "11011110";
ins(6) <= "11011001";
ins(7) <= "11000101";
ins(8) <= "01100110";
process(clock)
variable ind : integer :=0;
begin
if(clock'event and clock = '1') then
if(PCin = '1') then -- send instruction and increment
output <= ins(ind);
ind := ind + 1;
elsif(PCJR = '1') then -- JR
ind := CONV_INTEGER(UNSIGNED(input));
elsif(PCJump = '1') then --JUmp
ind := CONV_INTEGER(UNSIGNED(address));
elsif(beq = '1') then
if(beq_control = '1') then
-- PC - 8
ind := ind - (CONV_INTEGER(UNSIGNED(address)));
else
--PC + 8
ind := ind + (CONV_INTEGER(UNSIGNED(address)));
end if;
end if;
end if;
end process;
end logic;