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Altera_Forum's avatar
Altera_Forum
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12 years ago

IIR filter implementation in verilog

does anyone have the idea how to get rid of extra bits that comes in IIR filter due to feedback?each time the feedback occurs the inputs bits gets changed and so is the case with the output bits?I ju...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
12 years ago

Thanx! I will try it. one more thing I want to ask is that I am using a twin pipe serial parallel multiplier for multiplication in filter.I am not getting any idea to write its behavioural code! if you have any sample code for this multiplier please do post it....