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Altera_Forum's avatar
Altera_Forum
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7 years ago

IEEE 1735 encryption in Quartus

I have been using the IEEE 1735 encryption tool in Quartus Pro 17.1 but I cannot seem to find the right way of using the --simulator option. I issue the following command: C:>C:/intelFPGA_pro/1...
SBA_ACCELIZE_COM's avatar
SBA_ACCELIZE_COM
Icon for New Contributor rankNew Contributor
7 years ago

I made a try and I've the same issue with 17.1pro (linux).

I was able to encrypt with the simulation switch under 18.1pro (linux):

encrypt_1735 --language=verilog --simulation=mentor,cadence test_counter.v

For what I see in the encrypted file, If you don't add the --quartus swith, the encyphered aes key for intel is not added and it will not allow the quartus synthesis.

If you only add simulation switch, it will only allow IP decryption on the requested simulators.

FYI, I'm not familiar with this exe (encrypt_1735), I'm using a dedicated script that handle file encryption and where I embed several EDA 1735 keys to generate my custom encrypted lib.