Forum Discussion
Altera_Forum
Honored Contributor
14 years agoYes Frank.. That seems to be the best option when using VHDL.
Regards Balu --- Quote Start --- Hello, I normally use explicite bit assignments instead of shift operaters in VHDL, e. g.shiftreg <= '0' & shiftreg(shiftreg'left downto 1); -- right shift Regards, Frank --- Quote End ---