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ZC0001
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6 years ago

I am confused about the Equation 5 in the AN433

Hi,all. I am currently learning about FPGA interface constraints. Now I am confused about the Equation 5 in the AN 433: Constraining and Analyzing Source-Synchronous Interfaces.I don't know how to...
ZC0001's avatar
ZC0001
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6 years ago

Hi, Anand

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Thanks for your reply.

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I think i can understand the setup,hold and slack time correcctly. I am comfused about the equation 5 or the skew method because i don't konw why using 'maximum/minimum delay of data to calculate the required time of data . Now I think this is because the required time is the time when the data arrival at the FPGA output pin , not the time when the data reaches the external chip pin.

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I don't know if I understand it correctly.

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Thanks again.

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​ZC