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Altera_Forum
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15 years ago

how to write test bench to see internal signals in ModelSIM-Altera

Hi, I've created a small microprocessor, with internal register, counter, ALU, ... and i want to see the internal value of some of them in the modelsim simulation (RTL and gate level). It was...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
15 years ago

Hello,

Effectively, to solve my problem i learn how to use ModelSim-Altera and i found how to add internal signals in the simulation.

Nevertheless, if there is solutions in VHDL to specify it, i think that it will be more satisfying.

Bests regards to all,

EON