How to write tcl command in sdc file for generated clock inside a component?

Your problem is that you are trying to assign the clock to a net, and the clock is traversing through a register, which is a timing node. You cannot traverse through a timing node to do this. If you make your target of your generated clock the register bit that is driving that net, it will work as you expect.

create_generated_clock -name {clk_160ns} -source [get_ports {clk}] -divide_by 4 [get_registers {a[2]}]

(This assumes that bit 2 of your register "a" is what is driving the divide by 4 on the input clock).