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Altera_Forum
Honored Contributor
15 years agoIn a simulation of your latest code with CIII, I see the data appearing at MEM_DATA_bidir about 7 ns after rising clock edge, which I consider as "one clock read operation".
In a simulation of your latest code with CIII, I see the data appearing at MEM_DATA_bidir about 7 ns after rising clock edge, which I consider as "one clock read operation".