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Altera_Forum
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15 years ago

How to write a verilog memory code with a inout data port

Hi all, I was trying to write a verilog code for a memory module which has has a bidirectional inout port for the data. But I also want to output high impedance during write or if MEM_OE(out...
Altera_Forum's avatar
Altera_Forum
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15 years ago

CycloneIII C7 100Mhz

one clock operation in case if all memory compile in logic registers. not memory.

my simulation on previous page was for memory. and seems to be working fine.

outputs in simulation was not VirtualPins. it cost + several ns to timings

I hope I am expressing myself correctly =)