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Altera_Forum
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15 years ago

How to write a verilog memory code with a inout data port

Hi all, I was trying to write a verilog code for a memory module which has has a bidirectional inout port for the data. But I also want to output high impedance during write or if MEM_OE(out...
Altera_Forum's avatar
Altera_Forum
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15 years ago

in this case quartus optimize storage to memory (see resource usage report)

for instant one clock access operation you need use logic registers instead of memory.

but this lead to much more resources usage