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Altera_Forum's avatar
Altera_Forum
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15 years ago

How to write a verilog memory code with a inout data port

Hi all, I was trying to write a verilog code for a memory module which has has a bidirectional inout port for the data. But I also want to output high impedance during write or if MEM_OE(out...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
15 years ago

anyway your code works in Quartus simulator.

check out: you declared 12-bit wide address bus, but just 256 memory cell.

maybe error in simulation?

and pay attention that reading process is not just one clock like writing.