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Altera_Forum's avatar
Altera_Forum
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18 years ago

how to work on picture viewer examples in NIOS II

hai friends i am arun, i am just a starter for Altera . i am having a Nios II embedded development kit cyclone III edition . i installed the free package given by altera. on working in design examples given in EDK ,i can see picture viewers, webservers ..etc in the examples folder. in that i took the sof file which is already given for picture viewer and fuzed in to FPGA using quartus programmer, then i opened the nios II IDE to build the software file for the processor, in the nios C/C++application project ,in the target processor option i choosed picture.ptf and cpu, and in the project name i choosed blank project instead of other templates given. then the tools has created a folder for me in one location then i copied the picture_viwer.c from app folder and pasted in blank project and then on refreshed the blank project in IDE , i can see the picture_viwer.c included in it, the i gave build option, after few minutes i saw so many errors saying that few files are not there, the i searched for all the missing files and copied in the blank project folder. after doing that also i finding errors saying unable to parse * token in UCOSII.h like that. so please tell me the procedure for running this project in to NIOS II processor.

4 Replies

  • Altera_Forum's avatar
    Altera_Forum
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    18 years ago

    All of those software examples are meant to be used in the software build tools flow....command line, not IDE.

    You're welcome to read up in the handbook regarding this flow, but (for now) all you need to know is that you 'cd' to the project's location and type 'make'. To download & run, you'd type:

    'nios2-download -g <project>.elf && nios2-terminal'

    The "&& nios2-terminal" might not be necessary. To debug, you'd have to import the project into the IDE and debug in the normal fashion.

    All of this should be documented, so I recommend you start doing some reading....
  • Altera_Forum's avatar
    Altera_Forum
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    18 years ago

    hai , thank you for your kind information. i went through your flow and now its working perfectly. i have one more question, while building my own system using SOPC builder and after that instantiating in to quartus II project , assingning pin and compilation , i am getting owndesign_timelimited.sof . when i try to fuze this in to the FPGA, its not taking it. what could be the problem.

    regards

    Arun.k
  • Altera_Forum's avatar
    Altera_Forum
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    18 years ago

    --- Quote Start ---

    owndesign_timelimited.sof

    --- Quote End ---

    This means that you:

    1. Don't have a license and/or don't have your license installed properly.

    2. Must be "tethered" in order for your FPGA design to function.

    After programming your board, in Quartus II, do not close the window that pops up. This window is a visual representation of a process that runs on your PC to ensure that your non-licensed IP isn't used standalone. On the FPGA, the IP cores that don't have licensing check to see that you're still connected (via your JTAG cable) to the PC. If you disconnect the cable (or close the above-mentioned window), this IP will stop functioning.

    Hope that helps!
  • Altera_Forum's avatar
    Altera_Forum
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    18 years ago

    hai, i am having nios II embedded development kit cyclone III version. i designed a system in SOPC builder using the following peripherals.

    1. Nios II f/core (reset vector to CFI flash & exception vector- onchip ram

    2. onchip mem (M9k with 2 Kbytes

    3. jtag uart

    4.tristate bridge (with shared address lines option)

    5. CFI flash (custom with 23 add and 16 data)

    6. SSRAM and

    7. led

    after generating the code and instantiating the design in quartus II project , synthesized and assigned the pins for all.

    when i tried to compile the above design, there is a error saying that.

    "cant place pins assigned to tristate_data[0]- PIN_H3, d[1]-PIN_D1 & select_flash - PIN_E2 ".but when i remove these three and compile that , it is compiling 100 %. i clearly followed the data sheet and gave the pin numbers. what could be the problem , kindly tell me .

    regards

    Arun.k