Forum Discussion
Altera_Forum
Honored Contributor
18 years agohai, i am having nios II embedded development kit cyclone III version. i designed a system in SOPC builder using the following peripherals.
1. Nios II f/core (reset vector to CFI flash & exception vector- onchip ram 2. onchip mem (M9k with 2 Kbytes 3. jtag uart 4.tristate bridge (with shared address lines option) 5. CFI flash (custom with 23 add and 16 data) 6. SSRAM and 7. led after generating the code and instantiating the design in quartus II project , synthesized and assigned the pins for all. when i tried to compile the above design, there is a error saying that. "cant place pins assigned to tristate_data[0]- PIN_H3, d[1]-PIN_D1 & select_flash - PIN_E2 ".but when i remove these three and compile that , it is compiling 100 %. i clearly followed the data sheet and gave the pin numbers. what could be the problem , kindly tell me . regards Arun.k