Forum Discussion
2 Replies
- Altera_Forum
Honored Contributor
Pin planner is where abstract notions of signals get mapped to physically real pins. The signal names must be fully specified to map them to a pin. Although it might be helpful to use * to map a bus to the same I/O standard I don't think that's possible.
- Altera_Forum
Honored Contributor
Hi Galfonz, Thanks for reply.
Yes. The intention is just to map these signals to the same I/O standard. For the pin mampping, I have fully specified the name for each pin(see picture 1). Now, i'm want to spcify these signals to the same I/O standard "1.5V PCML". Can I use wildcard like "dp*_rx_d*[*]" ?