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Altera_Forum's avatar
Altera_Forum
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15 years ago

How to share settings among several QII projects

I have one board layout that is used for several different FPGA designs. I want to share the parts of the settings that are the same among all the designs. The concept I want is an 'include' capability for settings. For example, all the designs have the same IO assignments, voltage, location, enables--they're all on the same board. But each design uses its own source files to define its logic.

How can I share my device and pin assignments, programming options, and other common settings across all the designs? With many designs and many pins, it can be very difficult to keep everything in step if there's a pin name change.

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  • Altera_Forum's avatar
    Altera_Forum
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    15 years ago

    qip can be very usefull if you are going to use a module within different designs.

    sopc components can include the top level and the qip with all sub level files., no need to edit the sopc component just edit the qip

    the qip, as you said, tells quartus where to look for other files, add them to the project

    but what i am still seeking for is, how to make shure a tcl listed in qip is executed

    qip, i like them more and more each time i use them
  • Altera_Forum's avatar
    Altera_Forum
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    15 years ago

    So where did you learn of their capabilities? How do you learn more? Where do you learn their syntax and limitations?

  • Altera_Forum's avatar
    Altera_Forum
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    15 years ago

    that a typical engineer task, knowing where to look and then copy :-)

    each time i see a qip file, i take a look into it if there could be something i haven't seen yet

    limitations ? by try'n'error
  • Altera_Forum's avatar
    Altera_Forum
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    15 years ago

    Unfortunately, that is what I thought. But I had hope that Altera might have published something to reduce the mystery. Guess not.

    Thanks, though.
  • Altera_Forum's avatar
    Altera_Forum
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    15 years ago

    this forum is a also a good place to find answers or ask for them

    the manual thepancake gave a link to, was new to me but i haven't searched for it yet

    as jakobjones already wrote in another thread, google is a good seach tool even for these informations

    unfortunately you are right as some information a not so simply visible, thats a reason why users here write documentations or how to's like for sdc
  • Altera_Forum's avatar
    Altera_Forum
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    15 years ago

    you could generate a DDR2/3 memory core, and take a look at the <variation_name>pin_assignments.tcl and edit to your liking.

    there are also some neat reference designs around that create the project from source during every build. these projects pull in a qsf during their complication and could be edited to target your board. unfortunately i can't quite remember which ones do that.