How to reliabily program multiple FPGAs using quartus_pgm?

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Thanks for investigating this issue, but your answer is technically incorrect. I only have one FPGA on each JTAG chain not several. So there are no signal integrity issues with the JTAG. The problem is that I have multiple USB connections, one for each FPGA, and the jtagd driver does not cope well with multiple FPGAs each on their own USB-to-JTAG adapter. I'm certain that this is a software issue and not a hardware issue as previsouly explained:

1. Disable some USB ports in software, effectively removing some FPGAs visible to jtagd. The remaining FPGAs could then be repeatedly programmed successfully without and reported errors.
2. Run eight Docker containers each with one jtagd that can only see one FPGA. The FPGAs can then be repeatedly programmed reliably.

I would still like somebody at Intel to test jtagd when at least four evaluation cards are connected to the same PC using a USB-to-JTAG link for each board. The bug manifests itself most clearly if the FPGAs and the bit image for the FPGAs is large.

Given that jtagd is designed to support multiple FPGA evaluation cards, I am looking for confirmation that there is a regression test that it does indeed work correctly when several cards are connected to the same machine, e.g. that jtagd can in fact reliabily handle multiple FPGA evaluation cards connected. This seems like a reasonable request.

Hi Simon,

When you've mentioned that you're facing the issue with quartus_pgm, how about using Programmer GUI?

Regards,

Fakhrul

I have used both the Programer GUI and the command-line quartus_pgm tool with identical results.

Hi Simon,

I see, I've talked with some experts, and he said that it might be due to the hub issue. Maybe the power to the blaster is not fully sufficient. Is there any issue if only connected to 3 blaster on each hub?

Hello Fakhrul,

As I previously mentioned, signal integrity issues and USB hubs are very unlikely to be the problem given the experiement I've undertaken using Docker contains. In each Docker container I put one jtagd and ensured it had access to just one of the USB ports. So I end up with eight Docker containers, one for each FPGA board. At that point porogramming is reliable. Therefore it seems improbably that the issue is signal integrity related. I'm pretty certain the issue is with jtagd not being able to reliably handle multiple FPGAs where each FPGA board has its own USB-to-JTAG.

Ideally I'd like to talk with somebody who maintains jtagd. Might this be possible? It might be worth setting up a call. My contact details can be found here:

<link removed - you can be contacted by PM>

- Simon