How to reliabily program multiple FPGAs using quartus_pgm?

Thanks for investigating this issue, but your answer is technically incorrect. I only have one FPGA on each JTAG chain not several. So there are no signal integrity issues with the JTAG. The problem is that I have multiple USB connections, one for each FPGA, and the jtagd driver does not cope well with multiple FPGAs each on their own USB-to-JTAG adapter. I'm certain that this is a software issue and not a hardware issue as previsouly explained:

1. Disable some USB ports in software, effectively removing some FPGAs visible to jtagd. The remaining FPGAs could then be repeatedly programmed successfully without and reported errors.
2. Run eight Docker containers each with one jtagd that can only see one FPGA. The FPGAs can then be repeatedly programmed reliably.

I would still like somebody at Intel to test jtagd when at least four evaluation cards are connected to the same PC using a USB-to-JTAG link for each board. The bug manifests itself most clearly if the FPGAs and the bit image for the FPGAs is large.

Given that jtagd is designed to support multiple FPGA evaluation cards, I am looking for confirmation that there is a regression test that it does indeed work correctly when several cards are connected to the same machine, e.g. that jtagd can in fact reliabily handle multiple FPGA evaluation cards connected. This seems like a reasonable request.