How to read USERCODE from FPGA?

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How to read USERCODE from configured FPGA?

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Using quartus_stp, you can issue JTAG commands to get this info, i.e.,

#  -----------------------------------------------------------------#  JTAG access (open/close)#  -----------------------------------------------------------------
#  Open the DE2 Cyclone II device using the on-board USB-Blaster.
proc jtag_open {} {
   #  Get the list of JTAG controllers
    set hardware_names 
    
   #  Select the first JTAG controller
    set hardware_name 
    
   #  Get the list of FPGAs in the JTAG chain
    set device_names 
    
   #  Select the first FPGA
    set device_name 
    puts "\nJTAG: $hardware_name, FPGA: $device_name"
    open_device -hardware_name $hardware_name
        -device_name $device_name
}
#  Close the device
proc jtag_close {} {
    close_device
}
#  -----------------------------------------------------------------#  JTAG instructions#  -----------------------------------------------------------------
#  Read the JTAG ID code#   * Expected ID code = 0x020B40DD# 
proc read_idcode {} {
    device_lock -timeout 10000
   #  Shift-IR: = IDCODE = 6
    device_ir_shift -ir_value 6 -no_captured_ir_value
    
   #  Shift-DR: read 32-bits
    set val 0x
    device_unlock
    return $val
}
#  Read the JTAG USERCODE code#   * If its not set, then the expected value is 0xFFFFFFFF#   * The USERCODE can be set using, eg.#      set_global_assignment -name STRATIX_JTAG_USER_CODE 12345678# 
proc read_usercode {} {
    device_lock -timeout 10000
   #  Shift-IR: = USERCODE = 7
    device_ir_shift -ir_value 7 -no_captured_ir_value
    
   #  Shift-DR: read 32-bits
    set val 0x
    device_unlock
    return $val
}

Put the above in a file, save as say jtag.tcl, and then in quartus_stp type

source jtag.tcl
jtag_open
read_idcode
read_usercode
jtag_close

Easy, eh!

Cheers,

Dave