ldm_as
Occasional Contributor
6 years agoHow to manage Verilog include files in Quartus?
Hi All,
How to manage Verilog include files in Quartus? I mean Verilog files, which include `define and parameters. Actually they don't need to be compiled separately. So, should they still be added as the source files to the Quartus Project? Should these file have some special attributes?
Thank you!
Hi Dmitry,
- USER_IP_SEARCH_PATHS =<Directory >. Example->USER_IP_SEARCH_PATHS = c:\users\anandr1x\desktop\testmw;
- How to manage files-> Has been addresed in your anotherpost.
https://forums.intel.com/s/question/0D50P00004Voq2s
Regards
Anand