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Altera_Forum's avatar
Altera_Forum
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14 years ago

How to make timing constraint in this case??

Hi all, I've used a counter to make a clock enable such that I could get a new clock with divided frequency. The waveform is shown as below. Because there must be some clock skews for the coun...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
14 years ago

That looks right to me.

You don't have to worry about the clock edge issues and skew. Because clock generates enable (e.g '1' for one period ,will be read as '1' on next clock edge and so on).