How to initialize a signal without any loops

Hi, I'm very new at learning VHDL and have some trouble dealing with unwanted results of the project I've been working on.

I'm designing a state machine for my school project. What I want to make is an accumulator that can accumulate points and reserve it.

For example, if you choose an item that gives you 1 point, it adds that up to your current point remaining(3) and go back to the

first screen of choosing other items. (my current point becomes 4)

So essentially, it should look like:

my_point_new <= my_point + item_point;

my_point <= my_point_new; (I also learned that this style of code does't work either)

The actual project is much more complicated than this, but I only have problem with this part (jumping from one state to another works fine.)

Inside the 7 bit adder port I put the signal mypoint_add as an input and used tri-state buffers to avoid infinite loop.

I assigned En1 and En2 to be (1,0) or (0,1) respectively for certain states, also assigned an initial value to the signal mypoint_add as "0000000"

Still, whenever I run a vector waveform simulation it shows that mypoint_add is always Z.

Is there any way I can make the initial value of signal mypoint_add to "0000000"?

Best regards,

Erik