How to incorporate a VHDL file within Top level file in Quartus not using Platform Designer

Hi,
it's not quite clear what you mean with "incorporate a file within the top level file"?

Basically all VHDL files added to your project are compiled and all design entities found therein added to default library work unless explicitely assigned to a different library.

Design entities are "incorporated" to your design by instantiating it in the design hierarchy, starting with the top level entity specified in Quartus project.

The best reference is VHDL language reference IEEE Std. 1076 or a VHDL text book of your choice.

Can you tell how far instantiation of design entities doesn't work for you?

Regards
Frank