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Altera_Forum
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12 years ago

How to Import whole the truth table into Quartus and automatically Optimize it

Hi every one I had designed a Combinational circuit in Quartus II 13.0 but it was not optimized as the number of input variables were so many I couldn't simplify it using Karnaugh Maps ,so I dec...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
12 years ago

also I should tell you that the photo I attached is Image of technology map viewer as you see it is Multi level logic gates and also here I saw an option that I saw karnaugh map of my circuit, so I don't think that you are right,

maybe on the Implementing to FPGA it acts as you said but I think before that it Minimizes the Circuit.