How to Import whole the truth table into Quartus and automatically Optimize it

We can't forget fpgas using Quartus. Probably ( 99,9% sure ) Quartus don't use Karnaugh maps. If you see in the tecnhology map viewer, the real implementation of a circuit, you see a multilevel implementation ( multi level LUT, NO multi level logic gate ), when Karnaugh map gives you a 2 level implementation. Quartus generates a good implementation for an Altera fpga. But there isn't the best circuit based on and-or-not gates. Use a software based on Quine-McKluskey method to get the kind of circuit you're looking for.