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Altera_Forum's avatar
Altera_Forum
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12 years ago

How to Import whole the truth table into Quartus and automatically Optimize it

Hi every one I had designed a Combinational circuit in Quartus II 13.0 but it was not optimized as the number of input variables were so many I couldn't simplify it using Karnaugh Maps ,so I dec...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
12 years ago

well I know what you mean but as a matter of fact in next step I have to Implement Transistor level of my digital circuit in ADS Software and simulated the whole Analog and digital parts together, so I need the optimized version of my digital circuit Individually.

could you plz explain more about "A way to implement a truth table when you can't describe with a logic expression or can't find a vhdl description, is an asynchoronous rom description in vhdl or veriflo and a lot of time to fill each row. "