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Altera_Forum's avatar
Altera_Forum
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13 years ago

How to identify if your design has a race condition.

I am currently working on a CPU and I managed to make it run an sequence of instructions (All it does is add 1 to a register and then store it into a memory mapped device which controls LEDs on my FP...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
13 years ago

Hmmm, I guess then I will have to change the instruction fetching unit to acommendate for it. I am going to test it first to see if the memory works when it is clocked 4 times higher then the CPU just to see if that is the issue. Also is there any way to tightly couple the memory with the CPU in QSYS or do I need to do it in the CPU design with a megafunction.