How to get QSYS to propagate SYSTEM_INFO GENERATION_ID value into composed component

Sure.

If you build this simple design you will find a top RTl with a QSYS in it.

Within the QSYS is a simple design of an I2C to Avalon-MM master attached to:

1. A SYSID component directly with ID=1

2. A QSYS Subsystem with a SYSID embedded in it with ID=2

3. A Composed QSYS component with a SYSID embedded in it with ID=3

Looking into the generated SYSID instances (source generated by QSYS) it is very easy to see that:

(1) has a timestamp properly generated: assign readdata = address ? 1646427247 : 1;

(2) has a timestamp properly generated: assign readdata = address ? 1646427247 : 2;

(3) does not have the GENERATION_ID (timestamp) flowing to the instance: assign readdata = address ? 0 : 3;

So basically, this does not work when a component is composed instead of included in a system or subsystem directly (this is taken from altera_avalon_sysid_qsys_hw.tcl).

# +-----------------------------------
# | parameters
# |
add_parameter timestamp INTEGER 0
set_parameter_property timestamp DEFAULT_VALUE 0
set_parameter_property timestamp DISPLAY_NAME "Time stamp"
set_parameter_property timestamp TYPE INTEGER
set_parameter_property timestamp UNITS None
set_parameter_property timestamp AFFECTS_GENERATION true
set_parameter_property timestamp HDL_PARAMETER false
set_parameter_property timestamp SYSTEM_INFO GENERATION_ID
set_parameter_property timestamp ENABLED false
set_parameter_property timestamp VISIBLE false
set_parameter_property timestamp DERIVED true
# |
# +-----------------------------------

The HW.TCL for the "composed" component is this:

# _hw.tcl file for composed
package require -exact qsys 14.0

# module properties
set_module_property NAME {composed}
set_module_property DISPLAY_NAME {Composed sysid}

# default module properties
set_module_property VERSION {1.0}
set_module_property GROUP {dcattley}
set_module_property DESCRIPTION {Composed component with sysid embedded}
set_module_property AUTHOR {dcattley@velodyne.com}

set_module_property COMPOSITION_CALLBACK compose
set_module_property opaque_address_map false

# +-----------------------------------
# | parameters
# |
add_parameter id INTEGER 0
set_parameter_property id DEFAULT_VALUE 0
set_parameter_property id DISPLAY_NAME "32 bit System ID"
set_parameter_property id TYPE INTEGER
set_parameter_property id UNITS None
set_parameter_property id AFFECTS_GENERATION true
set_parameter_property id HDL_PARAMETER false
add_parameter timestamp INTEGER 0
set_parameter_property timestamp DEFAULT_VALUE 0
set_parameter_property timestamp DISPLAY_NAME "Time stamp"
set_parameter_property timestamp TYPE INTEGER
set_parameter_property timestamp UNITS None
set_parameter_property timestamp AFFECTS_GENERATION true
set_parameter_property timestamp HDL_PARAMETER false
set_parameter_property timestamp SYSTEM_INFO GENERATION_ID
set_parameter_property timestamp ENABLED false
set_parameter_property timestamp VISIBLE false
set_parameter_property timestamp DERIVED true
# |
# +-----------------------------------

# +-----------------------------------
# | display items
# |
add_display_item "" id PARAMETER
set_display_item_property id DISPLAY_HINT hexadecimal
add_display_item "Description" id text "Please use hexadecimal numbers only in System ID."
# |
# +-----------------------------------

proc compose { } {
# Collect parameter values into local variables
foreach var [ get_parameters ] {
set $var [ get_parameter_value $var ]
}

send_message info "composed:id = $id"

# Instances and instance parameters
# (disabled instances are intentionally culled)
add_instance clk clock_source 18.1
set_instance_parameter_value clk {clockFrequency} {50000000.0}
set_instance_parameter_value clk {clockFrequencyKnown} {0}
set_instance_parameter_value clk {resetSynchronousEdges} {NONE}

add_instance csr altera_avalon_mm_bridge 18.1
set_instance_parameter_value csr {ADDRESS_UNITS} {SYMBOLS}
set_instance_parameter_value csr {ADDRESS_WIDTH} {10}
set_instance_parameter_value csr {DATA_WIDTH} {32}
set_instance_parameter_value csr {LINEWRAPBURSTS} {0}
set_instance_parameter_value csr {MAX_BURST_SIZE} {1}
set_instance_parameter_value csr {MAX_PENDING_RESPONSES} {4}
set_instance_parameter_value csr {PIPELINE_COMMAND} {1}
set_instance_parameter_value csr {PIPELINE_RESPONSE} {1}
set_instance_parameter_value csr {SYMBOL_WIDTH} {8}
set_instance_parameter_value csr {USE_AUTO_ADDRESS_WIDTH} {1}
set_instance_parameter_value csr {USE_RESPONSE} {0}

add_instance sysid altera_avalon_sysid_qsys 18.1
set_instance_parameter_value sysid {id} $id

# connections and connection parameters
add_connection clk.clk csr.clk clock

add_connection clk.clk sysid.clk clock

add_connection clk.clk_reset csr.reset reset

add_connection clk.clk_reset sysid.reset reset

add_connection csr.m0 sysid.control_slave avalon
set_connection_parameter_value csr.m0/sysid.control_slave arbitrationPriority {1}
set_connection_parameter_value csr.m0/sysid.control_slave baseAddress {0x0000}
set_connection_parameter_value csr.m0/sysid.control_slave defaultConnection {0}

# exported interfaces
add_interface clk clock sink
set_interface_property clk EXPORT_OF clk.clk_in
add_interface csr avalon slave
set_interface_property csr EXPORT_OF csr.s0
add_interface reset reset sink
set_interface_property reset EXPORT_OF clk.clk_in_reset

# interconnect requirements
set_interconnect_requirement {$system} {qsys_mm.clockCrossingAdapter} {HANDSHAKE}
set_interconnect_requirement {$system} {qsys_mm.enableEccProtection} {FALSE}
set_interconnect_requirement {$system} {qsys_mm.insertDefaultSlave} {FALSE}
set_interconnect_requirement {$system} {qsys_mm.maxAdditionalLatency} {1}
}

## --end-- ##

regards,

Dave Cattley