How to force Qsys library component to use registers for SCFIFO

Hi ,

I managed to find a non-elegant work around but I would prefer a method of integrating the settings into Qsys

i.e setting the "use_ead" to "OFF" within the Qsys tool.

My work around is simply to edit the Qsys generated HDL file located in "system_name"/synthesis/submodules/xx_sgdma_x.v and locate the SCFIFO instance and then manually edit the parameter. Obviously this could be scripted,

but is one more step to remember and document.

If anyone knows of a way of setting the "use_ead" parameter ( or any other parameter) from within Qsys I would be most grateful.

Thanks

Mike

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Hello,

I am trying to implement a Qsys design but I am running out of M9K RAMS, the design uses 2 more M9K than those

available in the FPGA.

The design uses 2x sgdma. I looked at the RAM resource use and the sgdma has a command FIFO of 45 x 2 bits. This uses

2 x M9K and is implemented with a SCFIFO.

I would like to force these instances of SCFIFO to use registers instead of M9K since I have plenty of spare regs. I should

be able to set the parameter "use_eab" to "OFF". I am new to Qsys and can not find out how or where to set this parameter

for these particular instances of SCFIFO.

I believe it would be easy to set the parameter if the SCFIFO was instantiated as a Mega Function but that sort of defeats

the purpose of Qsys.

Any help would be much appreciated.

Thanks

Mike

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