Solved
Forum Discussion
sstrell
Super Contributor
9 months agoYes, that's another way to do it with the memory as an IP and a .hex or .mif file. It seemed like you wanted to do it through code inference.
BobA
New Contributor
9 months agoIf there's another way to do this, I love to hear about it.
I didn't really understand your previous comment about using a .dat file. The .mem file I'm using is in the format accepted by $readmemh.
- sstrell9 months ago
Super Contributor
I've always used .dat for this. I've never actually heard of .mem. This article uses .txt actually: https://fpgacoding.com/test-bench-data-files-in-verilog/
- BobA9 months ago
New Contributor
It's just the extension. I know the file's contents are in $readmemh's format.
The bigger concern is that the 'initial' block doesn't get synthesized. But is there another way to initialize memory in the synthesized Verilog?