Forum Discussion
ak6dn
Regular Contributor
3 years agoThe info is right in the reports. Do you not see it?
Maximum frequency is displayed at the worst case corner (184.2 MHz).
Percentage utilization of chip resources (2% of logic, no memory used).
What else are you looking for?
In the .sta.txt timing report is this table:
+-------------------------------------------------+ ; Slow 1100mV 85C Model Fmax Summary ; +-----------+-----------------+------------+------+ ; Fmax ; Restricted Fmax ; Clock Name ; Note ; +-----------+-----------------+------------+------+ ; 184.2 MHz ; 184.2 MHz ; clk ; ; +-----------+-----------------+------------+------+
In the .fit.tx report is the table:
+---------------------------------------------------------------------------------------+ ; Fitter Summary ; +-------------------------------------+-------------------------------------------------+ ; Fitter Status ; Successful - Sat May 14 18:07:14 2022 ; ; Quartus II 64-Bit Version ; 13.0.1 Build 232 06/12/2013 SP 1 SJ Web Edition ; ; Revision Name ; sha3 ; ; Top-level Entity Name ; keccak ; ; Family ; Cyclone V ; ; Device ; 5CGXFC7C7F23C8 ; ; Timing Models ; Final ; ; Logic utilization (in ALMs) ; 1,110 / 56,480 ( 2 % ) ; ; Total registers ; 1683 ; ; Total pins ; 135 / 268 ( 50 % ) ; ; Total virtual pins ; 0 ; ; Total block memory bits ; 0 / 7,024,640 ( 0 % ) ; ; Total DSP Blocks ; 0 / 156 ( 0 % ) ; ; Total HSSI RX PCSs ; 0 / 6 ( 0 % ) ; ; Total HSSI PMA RX Deserializers ; 0 / 6 ( 0 % ) ; ; Total HSSI PMA RX ATT Deserializers ; 0 ; ; Total HSSI TX PCSs ; 0 / 6 ( 0 % ) ; ; Total HSSI PMA TX Serializers ; 0 / 6 ( 0 % ) ; ; Total HSSI PMA TX ATT Serializers ; 0 / 6 ( 0 % ) ; ; Total PLLs ; 0 / 13 ( 0 % ) ; ; Total DLLs ; 0 / 4 ( 0 % ) ; +-------------------------------------+-------------------------------------------------+
- ahmedhs3 years ago
New Contributor
Thank you so much
That was my mistake I didn't see it
Your answer was good enough I don't need anything else for now
Again thank you so much