How to debug Internal compiler error of I++

I am experimenting with Quartus 19.4. I have a component to create IP using the HLS compiler. I followed a Makefile structure very similar to what is found in the counter example. While that example seems to work fine, when doing make test-fpga I get the following output:

Target FPGA part name:   10CX220YF780I5G
Target FPGA family name: Cyclone10GX
Target FPGA speed grade: -5
Analyzing testbench_bilateral_filter_fixed.cpp for testbench generation
Creating x86-64 testbench 
Analyzing testbench_bilateral_filter_fixed.cpp for hardware generation
Optimizing component(s) and generating Verilog files
Internal Compiler Error: Number of parameters mismatched. This may be due to empty types are being optimized away
HLS Main Optimizer FAILED.
Makefile:61: recipe for target 'test-fpga' failed
make: *** [test-fpga] Error 1

How can I debug or find more information about the actual issue? I have reduced the code to a minimum and hardcoded many parts but cannot find a way around this issue.

UPDATE: I have reduced the code to a minimum to reproduce this issue. It seems the problem is when the component is a class member (code adapted from this video):

#include "stdlib.h"
#include "HLS/stdio.h"
#include "assert.h"
#include "HLS/hls.h"
 
class ProofOfComponent
{
public:
    component int accelerate(int a, int b);
};
 
component int ProofOfComponent::accelerate(int a, int b)
{
    return a+b;
}
 
int main(int argc, char** argv)
{
    ProofOfComponent poc;
    srand(0);
    int x = rand()%10;
    int y = rand()%10;
    int z = poc.accelerate(x, y);
    printf("%d + %d = %d\n", x, y, z);
    assert(z == x + y);
 
    return 0;
}

Could somebody explain why this is not possible? It is standard C++.

Thank you in advance!