Forum Discussion
Altera_Forum
Honored Contributor
13 years ago --- Quote Start --- You need to use double quotes, " for a string. --- Quote End --- Ah, my bad. I just copied his line and didn't notice he'd used single quotes. --- Quote Start --- Also, this is just a hex string, not a decimal integer. a std_logic_vector is not an integer, it is a collection of bits. To assign it from an integer, you need to convert it via the numeric_std package constant preamble : STD_LOGIC_VECTOR (55 DOWNTO 0) := std_logic_vector( to_unsigned( 555555, 56 ) ); --- Quote End --- True for older VHDL, but VHDL-1993 onwards will correctly convert the hex string to a std_logic_vector without needing to convert it explicitly. Not that yours is wrong, just two ways to skin this cat :). Personally I prefer the cleaner look of the direct assignment without lots of explicit type conversions. Mark.